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Hi there,I'm starting to use the NUCLEO-H533RE board to evaluate the H5 device family.RM0481 has some errors on the PLL configuration:Fig.55 on page 461 shows a VCO range 0 between 128 and 560 MHz, but the description of bit 5 of register PLL1CFGR (p...
Hey all,I have a Sony IMX686 camera module connected to the STM32N6 Discovery Kit, streaming video to the on-board LCD. The sensor outputs a single-stream RAW Bayer format on Virtual Channel 0, and the DCMIPP receives the data correctly — up to a cer...
Hi. I'm trying to read data from W25Q64 flash memory.These are my connections:And these are my SPI and RCC and GPIO settings:And these are my functions and main code:Using W25Q_ReadID function, i could read device ID.But i can't read data stored on d...
Hello folks,I am investigating the Video Encoder on the STM32N6 and have been working through the reference project (VENC_SDCard_ThreadX).The user manual (RM0486) is very vague on detailing the Video Encoder, and lists over 100 pages of registers whi...
I'm writing a UART driver for NUCLEO-F103RB and I followed all steps in the book "Bare-metal embedded C programming" and advices from Gemini but still can't see the receiving output from my PC.How can I fix this?Other parts than UART work without pro...
Hi, On STM32G071CBU6, when PB15 is used as CC2 with DBCC2 shorted to CC2, does the ROM bootloader ever drive PB15 as SPI2_MOSI, or does the CC/dead-battery own the CC2 pin and that path always takes priority? This detail is critical for our design be...
Hi everyone!I figure out that Type III Format Interface Descriptor is generated automatically on STM32L476RG, and this use encoder format to transmit audio (Not PCM). Frame size vary an do mot match PCM packet sizes, meaning that transmitting raw PC...
Hi everyone,I’m working on an STM32F4-based project and facing inconsistent I2C communication stability between the MCU and an external sensor. The issue appears mainly when the sensor performs clock stretching, which causes the STM32 to miss data or...
Hi,I noticed that for the FLASH PECR register there is a discrepancy between the RM and the CMSIS files provided by ST.The RM includes information about the `NZDISABLE` bit (which is not present in the CMSIS file `stm32l010x6.h`). On the other hand, ...
How to develop STM32C091 series, use stlink V2 or stlink V3?
