Hello everyone,I have to work on an already existing project using the STM32F769I_DISCO which works properly. My task is to write logs in a file on a SD card. I followed the excellent tutorial by Nicolas Fillon for STMicroelectronics about the matter...
OTP portion of FLASH is a valuable asset in some STM32 families and represents a convenient place to store things like security keys. For this, it is desirable - and, as it's part of FLASH, also quite logically expected - that setting read-out protec...
I will be using 16 channels of STM32 ADC and I would like to protect them against overvoltage and ESD (those will be used as device inputs and unwanted situations can happen), my initial thought was to use a Zenner diode array and current limiting re...
Greetings!I generate periodically a 10MHz PWM signal of 8 pulses. The PWM signal has high polarity so the first edge is falling. I need to generate an interrupt/event on the rising edge that'll signal DMA to move data from a GPIO IDR to a data buffer...
Hello,I am working on a STM32L073V8T6. I want to use the 1/3 bias functionnality to manage a screen.I have configured the contrast control to 3.26V, the Mode to 1/4 Duty Cycle and the Bias Selector to 1/3 Bias. But if I write something to COM0 and...
Hi i am working with stm32l051c8t6 , i am using wakeup pin 1 to wakeup from standby mode, weather is that possible to make the wakeup pin should act as wakeup pin and also as external interrupt, it should wakeup when an external interrupt is detected...
Hi,I have custom developed board that uses STM32F401RCT6TR as MCU. I have LSM6DSLTR IMU sensor on the board and MCU is communicating with IMU using I2C1 channel (PB6 and PB7). I also have 2.4" screen (ILI9341) that displays IMU values and external EE...
STM32F769I Disc：Is the function of stm32f769i dico's QSPI DDR normal?When I used the ddr mode, I could send data using 1line, but when I used 4line, the device was busy until the timeout error occurred, and the data could not be sent normally.However...
This topic is inspired by discussions in ST forum and ARM forum, where a proper cache maintenance was sorted out and an example of a real-life speculative read was detected. Also there is another discussion, where a real-life example of cache evictio...
Dear Sir, Good morning!I use STM32F407vgt6. I need chip ethernet controller with MII interface from STM. I previously used DP83848 from Texas Instr. Please recommend me ethernet controller from STMTIASincerely,Vladimir Naumenkov
