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Forum Posts

Reasons for deadlock in H7 series

Hi all, I've recently begun playing around with Zephyr and made blinky for a custom board with a STM32H755.To test it, I made a complete chip erase and then I flashed the application to the M7 (i.e., its flash area). I can then attach to a debugger i...

dmx512 transmitter

Posted on July 24, 2017 at 13:22Hello I useing stm32f103c8(72mhz) and i want create DMX512 transmitter for  led lighing.I have some problem.I config usart like this.USART_InitStructure.USART_BaudRate = 250000; USART_InitStructure.USART_WordLength = ...

Resolved! usart3 on nucleo-h753 not work fine

I have been trying to transmit and receive from putty through the USB virtual com (CN1) of the core board, I tried with different baud rates and the result is always the same, garbage arrives at the putty, and I am not receiving anything either, it i...

TIM6 Configuration STM32G4

I am having trouble configuring my TIM6 to toggle a GPIO pin every 1 usec. I am using the HSI at 16MHz as the source for AHB bus clocks, which TIM6 is on. The following is my System Clock configuration:void SystemClock_Config(void){LL_FLASH_SetLatenc...

tomm5771 by Associate III
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Cannot Write register

Hello guys! I have a problem. I need to use HAL_RTCEx_SetSynchroShift function from HAL to modify the subseconds of the RTC module. The problem is that this function cannot work because the REFCKON bit from Control Register is set(1). First, I do not...

Phvne by Associate II
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fx_media_open timing is too slow. How do I speed this up?

Folks, I have a device that installs into another product and provides SRAM for code execution for the other device.  The device my board plugs into has a fixed 500ms RESET generator that hold off the host device CPU for that much time.  During this ...

VT_Jim_0-1717075480190.png
VT_Jim by Associate III
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STM32h7 problem with SDMMC Initialization

Hello,I'm using an STM32h753i-eval2 board and trying to access an SD card through the SDMMC peripheral.I have my RCC set on Master Clock Output 1.I has the SDMMC external transceiver present set to no.System clock mux is set to HSIPLL Source is HSIUs...

TLuke.2 by Associate II
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