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Hi, I’m trying to configure the FDCAN peripheral on a NUCLEO-STM32H72ZG board, but even though it works perfectly in loopback mode, it doesn’t work when I switch to normal mode. Even in external loopback, when I check with the oscilloscope I don’t se...
Dear all,I'm implementing Over-the-air firmware updates for a board using the STM32N657 MCU.In the Appli, I download the new firmware binary over Wifi and store it to RAM at a fixed location in AXISRAM5 and 6. In order to flash the new binary to the ...
Heyho,I recently found that I'm not using ITCM RAM at all, then started to put heap and stack there.No problems so far.Then I copied some functions there, and all went well - until I found some strange behaviour:1..4 SAI RX DMA transfers running, cir...
hello, where can i download win11 STM virtual com port? i install both VCP_V1.5.0_Setup_w7_x64_64bits and W8_x86_32bit all not working ! i din seeSTM Virtual Com port at device manager! only STM STLink visual com port appear ...
Hello,in our design with STM32H753ZIT6 I've adjusted the C0G load capacitors on the LSE 32.768 kHz crystal so that the real-time clock is now very accurate (less than 1 second error in 24 hours). I've always performed the calibration in VBAT mode at ...
Hello i use STM32G070CBT6 with PD0 and others pins.PD0 as input pin with no internal pull-up/down with extrenal 10k pullup gives only 0.7V, when i set the pin to output and set state to high there is 3.3V.Where is the problem?
Dear ST Community,I am currently migrating my Firmware from STM32H723VG to STM32H563VI. I have problem with Internal Temp Sensor. Based on Reference Manual on both MCU reading temperature is the same, but it doesn't work as it should.When on STM32H7 ...
Hello,I want to change for boot to use XSPI1 interface, but I am not sure about OTP bits, there in description some bits is not very clear, what OTP bits to set to switch if it's possible ?Additionally if I will use SD card for boot I can set OTP11 v...
Say I am operating as master with CPOL=1. Because the NSS pin seems to lag the enable bit (SPE) slightly, my logic analyzer always barfs on the first SPI packet because the clock is in the wrong state.So, I set the GPIO to have a pullup on the clock...
I'm working on a design with an STM32L072CZT6TR, where I want to calibrate my main timebase. That main timebase is TIM6, which counts 16,000. The HSE is 16MHz, so there's an interrupt evey 1ms. Calibration is done by counting the number of HSE cycles...
