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I tried doing line by line debugging to find out that Error code is being set by:HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)To be specific, this line of the code:else {...
Is it possible to program one byte per time on STM32H7.If it is supported, how should I do? Is there any demo?Thank you
Hi I am trying spi master on the stm32h7 nucleo board, when I am measuring the spi clock it looks like it is only giving me 400mV max, can someone explain to me why and how to solve it? Thanks!
Hello,I want to catch the half transfer and the full transfer flag from DMA controller but get an error and don't understand why.the compiler say first use in this function:'DMA_FLAG_HTIF5' undeclared (first use in this function)'DMA_FLAG_TCIF5' unde...
hi,I have a projecte to realize with my stm , the idea of the system is :*sending images by smartphone to sd card which is connected to the stm board ,sending by using bluetooth or wifi communication.*display the list of images on lcd also connected ...
I have DMA working in circular mode. However, after generating n cycles from a certain array, I would like to switch arrays without any processing time inbetween.I believe this can be done with double buffering. However, this doesn't seem to be possi...
I have configured a DAC to use DMA in single mode. I have created HAL_DAC_ConvCpltCallbackCh1(). In this function, I reenable the DMA process using HAL_DAC_Start_DMA(...), which appears to be really slow. How can I make this faster. I don't want to ...
Hi,I have a strange behavior on the bxCAN macrocells of a STM32F437 MCU and I'm here to askif someone has encountered the same situation.In my application I start programming one CAN module (say CAN1) to get some data sentfrom the other connected CAN...
The CC4NP bit in the TIMx_CCER register should be listed in the reference manual in the section "17.4.9 TIM1 and TIM8 capture/compare enable register (TIMx_CCER)". Currently, only the CC1NP, CC2NP, and CC3NP bits are listed. The sections for the othe...
The SDRAM has twelve address inputs A0-A11, where A11 is the bank select. In STM32CubeMX FMC section should I configure the SDRAM controller for 12 bit address and connect FMC_A0-A11 of the STM32H7 to the DRAM or configure for 11 bits and connect FMC...
