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Nucleo Boards Capabilities / peripherals table?

Hello,I've been trying to determine which Nucleo board will best fit a project on the drawing board. I've been searching to find a table listing all the board models, their CPUs, peripherals, etc. in order to make the decision easier. Can anyone po...

EXTI event. Se what event woke the MCU?

I'm using multiple external events through GPIO to wake the MCU from sleep. How can I check what source caused the event? Is there a register that I can read? What I understand is that the WFE instruction also clears the event register so I assume a...

sima2 by Associate III
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Running code from external SRAM on STM32f429

Hello, I would like to know if its possible on the STM32f429 to run code from an external SRAM. Since no QSPI connection is available on this MCU, the alternative would be using the FMC.I was only able to find an application note (AN5188) on this top...

NMaun by Associate
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stm32f103xg.h IS_TIM_SLAVE_INSTANCE() bug???

Posted on March 06, 2018 at 10:33According to RM008 DocID13902 Rev 17 page 447/1133  TIM9 supports 'External clock mode 1'TIM9/12 slave mode control register (TIMx_SMCR)Bits 6:4 TS: Trigger selection This bit field selects the trigger input to be us...

Interfacing STM32F722VET6 With Quad Memories

Posted on June 13, 2018 at 10:35Hello,I want to interface 512Mbit or 1Gbit I  with  STM32F722VET6 with CubeMX . I have seen lots of option for interfacing  ..Which option I need to select for below memory chips in Quad SPI Mode , Bank (s) and Why ?....

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