STM32H7 RM explains that I/O compensation cell code is set through PCC_MCC / NCC_MCC / PCC / NCC bits of SYSCFG_CCCR. What is not explained is the encoding of these four-bit fields. Is there some explanation somewhere that I missed?On the HAL side, t...

I have two sets (set A, set B) of 3 ADC channels that I'm sampling using continuous multi mode w/ DMA. For latency reasons, I'd prefer to sample set A for a while (let's say 1 msec), followed by sampling set B for a while, followed by sampling set A ...