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What is the impact of overlapping ADC conversion on STM32H743?

In the STM32H743 errata sheet (ES0392 revision 4), section 2.3.1 “Conversion overlap may impact the ADC accuracy�? leaves me with three questions:If I am reading correctly, this means that running conversions on two different ADCs, from two different...

CHead by • Associate III
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More documentation about VOSRDY

Hello,STM32F4 and F7 have a VOSRDY bit in PWR->CSR. Documentation about the bit is nearly not existant. On a F4, while still running on HSI, I changed the VOS setting. Waiting for VOSRDY in that state never succeeded. Looking for that bit just before...

STM32F746 CACHE: problem with Reset after SCB_DisableDCache();

Hi,I am using STM32F746 series MCU.1) After executing SCB_DisableDCache(), the CPU resets.2) The CPU starts up after repeating the reset multiple times.3) This symptom does not occur when debugging with JTAG (ST-Link) connected.Could someone know thi...

KNono by • Associate II
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Resolved! STM32L152

Hi,Is there somebody who really used the RTC using external crystal (HSE) of 32.768KHz ? I tried to use it but with no success.Using the RTC with internal oscillator of 40KHz (HSI) the all it's OK. I think that there is a problem with external crysta...

costi by • Associate III
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  • 10 replies
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Resolved! STM32L152 LSE

Hi,I want to use STME32L152 with LSE for RTC.I set the bit LSEON in the register RCC_CSR but the bit remains always 0. I proceeded the same with LSION and it is working well.I disable also the bit LSECSS and behavior is the same.The LSE oscilator did...

costi by • Associate III
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  • 4 replies
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Problem in sending the first byte in SPI communication.

Hello,I am using the STM32L053 microcontroller and it is currently communicating with another microcontroller (NRF52 ) through SPI protocol. The STM32L053 is slave and the other is the master.The application consists of :1) The Master(nRF52) sends a ...

VMaha by • Associate
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  • 2 replies
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Hello, We are using an STM32L4S5, and running into an issue with the DMA that is servicing the USART2 RX FIFO. The DMA appears to be getting starved. Is there any way to monitor the bus or DMA to see why this is happening? Thanks!

We are using an STM32L4S5, and running into an issue with the DMA that is servicing the USART2 RX FIFO. It appears that the USART FIFO is filling up, and the DMA is not able to keep pace. The baud rate is 460800 with hardware flow control turned on, ...

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