Openocd
I ported openocd to the stm32l522. https://github.com/morbos/openocd-0.10.1openocd -f board/st_nucleo_l522.cfgFrom there you can remote connect from gdb, flash, and see the s/ns processor regs. Watchpoints work also.Hedley
I ported openocd to the stm32l522. https://github.com/morbos/openocd-0.10.1openocd -f board/st_nucleo_l522.cfgFrom there you can remote connect from gdb, flash, and see the s/ns processor regs. Watchpoints work also.Hedley
Hello,On my custom designed PCB, there is a STM32F7 processor. With SPI DMA interface, I try to get the converting values of the external ADC. But everytime I get 3.1V in debug session. So how can I read the correct values based on the input signal?w...
Couple of complaints over at the Keil forum of the compiler shutting down, new key was published today (02-Jan-2020) to address that.https://www2.keil.com/stmicroelectronics-stm32/mdk
My board has QSPI NOR memory (MT25QL256, 32MB) and STM32H750. I used Studio, CubeMX and CubeProgrammer to work with QSPI external memory on F746G-Disco board with no problem. But I have problem on my board with QSPI. My H750-MT25QL schm is same as in...
Looking for confirmation that the SDRAM data bits can be swapped within their byte lanes (D15..D8, D7..D0) to reduce the routing complexity. We are using vanilla SDRAM (non-DDR), specifically the ISSI IS42S32800G.Thanks.
Hi all - Happy NY!I've a stm32H743ZI2 (nucleo) and am using the following code to init the IWDG __HAL_RCC_WWDG1_CLK_ENABLE(); __HAL_DBGMCU_FREEZE_IWDG1(); //not working!!!? // Reload = (LsiFreq(Hz) * Timeout(ms)) / (prescaler * 1000) hiwdg.In...
Hi ST Communities,My hardware choose is IS61WV51216BLL SRAM, 512 * 16 bit, the question now is whether the written data and read data are different, there will be a part of the data loss when reading, now is not sure there is something wrong with the...
Hi I have been looking for the sample code to implement the DFSDM using MEMS mic using a Single Data and Clock line. I am using CudeIDE 1.0.2V. The MCU I have H743ZI and the mic IM69D130 using a common Data and Clock lines. Channel 4 using Filter0 an...
does it need some time delay between two read multiple bytes function?is there some tip about it
Given figure can be found in the respective erratum in ES0250 Rev 7 ('L476 errata).And please remove the "modern feel and look" from this and all other errata.JW