I am programming the uC via UART that is connected via a Transceiver. The transceiver has an DE (Driver Enable) pin which is active high. Unfortunately, it has a pull down instead of pull-up in a design, therefor the uC can hear but can't talk back. ...
RM0316 says it's TIM5:but there's no TIM5 in the 'F3 (except 'F373, to which RM0316 does not apply).ST please clarify.JWPS. Textual search finds TIM5 also in description of the TIMx_CCRx registers, obviously copy-paste relics.
Dear sirs,I'm trying to use STM32F469I-DISCO USART6 (PG9 as RxD and PG14 as TxD).The transfer is succeed (I checked using a logic analyzer). But when set the transfer data to the DR register, 0x7F is appeared the DR register and RXNE bit is set, with...
which one is more advantageous to work with as a Student and developer.
I'm not sure if this is the best place to ask this question, but I thought I'd try in case someone knows where I might find answers.So I'm using a Nucleo F429ZI to communicate with the PuTTY Serial Terminal on my computer. I'm regularly updating some...
I am using stm32f429i discovery and stm32f429i eval boards for communication. Can anyone help me?
in RM0316 rev.8. FLASH_ACR.HLFCYA is described as enabling Flash half cycle access. Narrative in chapter 4.2.2 says:If there is not any high frequency clock available in the system, Flash memory accesses canbe made on a half cycle of HCLK (AHB clock)...
Hello, we switched from a STM32F7 to a STM32H7, porting the program to it. I disabled D Cache, because it wouldnt work together with the ethernet. Now we got another Problem:-Some Funtions of the STL are working, others are not. For example mmcpy or ...
It could be conveniently added to the vector table in Interrupts and Events chapter in the RMs.One reason why I am asking for this - besides the fact that this is quite a substantial information which ought to be present in documentation - is, that a...
