Missing information in RM0451 (L0 reference manual)
Hello,The reference manual for the L0x0 family is missing the ADC sampling time bits signification, p.287 table 13.11.6Best regards.
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Hello,The reference manual for the L0x0 family is missing the ADC sampling time bits signification, p.287 table 13.11.6Best regards.
Hi,I am working with the STM32L100C Discovery Board and trying to implement the stop mode to reduce current consumption. According to the data sheet, in stop mode the current can be reduced up to µA but I am still having about 26mA. This is my stop_m...
Hi guys,I have an application that requires TIM2 Ch2 to trigger ADC Ch3 every time the timer has a rising edge and in order to reduce the load on the CPU I'm doing it through DMA. Now I seem to have configured my application correctly as the ADC is o...
There is no problem in ADC1 and ADC3 offset calibration in STM32H745.However, when it comes to ADC2 offset calibration, it does not get out of the routine of calibration completion check routine.Is it ADC2 HW fault or ... ?I used the LL_ADC_StartCal...
Hello,I'm working on my own E load test equipment for my lab that will double as a battery capacity tester and I decided to use out lovely favorite chip the stm32F411ECU AKA "Black pill"So I've set up the conversion amount to around 20 @ continues mo...
Hey guys, I'm a bit confused in using the ADC in differential mode. I've got a shunt resistor and want to measure the voltage as exact as possible. One side of the shunt is connected to GND, but with higher currents, this GND is not anymore GND (it's...
Hi,I have purchases STM32L4R9AI Discovery Kit, It has Macronix Octa Flash (MX25LM51245G).I am trying to read the device ID In OCTA SPI Mode but unable to achieve the same.Does any one has the code or the LAB Tutorial on the same.I have gone through A...
I have set up a timer to generate a given waveform using the capture-compare register, fed from DMA. The OCxREF output is set to TOGGLE mode. The waveform consists of a pattern, repeating n times, after each ARR update. A new pattern is loaded into D...
I have a basic question on signal definitions used in the Ref Manual. The section on DMA interconnects refers to TIM3_UP, TIM3_UP, etc, and TIM3_Ch3/UP.First question: What is UP? This is not defined anywhere. Does it mean TIM3 gets updated? In CubeM...