Hi, I am looking for board which support 32bit data size in SPI Mode. I found NUCLEO-H743ZI2(https://www.st.com/en/evaluation-tools/nucleo-h743zi.html) development board but not very clear that it will support 32bit data size in SPI Mode or not. As...
I want to use STM32G474 controling a boost converter.A ADC channel(configered as injected convert) sense the inductor current，I do the configuration like this:The ADC channel is triggered by at middle of MOSFET on time;The ADC sensed pin is routed...
Hello everyone,We are using the STM32F103C8 connected with the Microchip RN4871 BLE module over UART1. We would like to update the firmware of the STM32 CPU over BLE but we are encountering a few issues. Our BLE module, although it works great for ou...
I want to use the external clock mode 2 but it dose not work ,configure the PA12 that connect to TIM1-ETR AND make push button pull down to send pulses to that pin(PA12) to detect high edge and make up count to the variable "upCount" in the code ,i t...
I am trying to read capacitance and temperature from the AD7746 capacitance-to-digital converter, using STM32F103 and HAL I2C library (SDA and SCL pulled up with 2k and Vcc = 3.3 V). I did it before using AVR (using Codevision) and it worked fine, bu...
When i used a bootloader to make user program run from QSPI Nor Flash in MemoryMappedMode, it worked well.But now i want to run user program from FMC SDRAM.So firstly i plan to initialized both QSPI Nor Flash(MemoryMappedMode) and FMC SDRAM,then copy...
Hi, my application needs to handle CAN message input, Updating the screen through UART, constant buffered LOG file writing to MicroSD card. I was wondering what kind of flow I could use?For CAN messages I could use interrupts and update variables (th...
The code below was implemented using a PsoC device. Maybe someone here can help me understand it and do the same in a STM32 device. AFAIK, the code is intended to build a quad buffer, but I don't understand how this is being implemented within a sin...
Hello, the STM32H7 (dual core) has two dedicated memory protection units. If I configure one MPU to make a memory region only accessable as readonly, does the memory protection unit from the other core inherit those configuration or is it bypassing ...
