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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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NOR Flash memory Quad SPI initialization

Hello,i need to use this flash memory with Quad SPI. I read the STM32 user manual and some examples of random evaluation boards.I think that this first step initialization should be okstatic void MX_QUADSPI_Init(void) {   /* USER CODE BEGIN QUADSPI...

AMerc.4 by Senior
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  • 3 replies
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Resolved! Two questions on I2C flags SB and BTF in STM32F446RE

Hi, I'm stepping through the code on Nucleo-F446RE board and doing the following:LL_I2C_GenerateStartCondition(I2C1); step++; while(!LL_I2C_IsActiveFlag_SB(I2C1)); LL_I2C_TransmitData8(I2C1,BMP180_ADDRESS_WRITE); step++; while(!LL_I2C_IsActiveFlag_A...

kj.obara by Associate III
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  • 3 replies
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SD (read-only) memory leaks issue

Hi, I hope you are well!I get stuck on the same issue since a few months:I stream multiple audio files (.wav), at the same time and continuously. After 24 hours of streaming, SD card files start to be corrupted (data is wrong) and when I inspect the ...

jean by Senior
  • 558 Views
  • 8 replies
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STM32F2 RXNE flag FROM SR register clear without reason

Hello,I am using UART4 from a STM32F2. I am sending a data then my RXNE FLAG from SR register go from 0 to 1. Without doing anything (no read of the DR register and no clearing manually the flag) it go back to 0 after some time. So I am missing the d...

haye by Associate II
  • 2107 Views
  • 19 replies
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I2C controller getting false arbitration lost

I've enabled the I2C controller and ask it to send a start condition on the bus, and it does, however, as soon as I write a data byte to the TX register, it releases the bus and raises an arbitration lost flag. How can this be possible when there is...

psusi by Associate II
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  • 2 replies
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Bus Usage Fault causes SRAM2 parity error

While testing the exception traps routines I ran into an odd problem with the SRAM2 parity check on an STM32L496. As part of a unit test I force a usage error by attempting to read from 0x3000 0000, an invalid address. The usage vector is called co...