STM32 MCUs products

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Chip select pin for SPI

I want to communicate with STM32f427 processor and 3 sensors via SPI. I want to use only SPI1 line. I need 3 chip select pins. There are 2 SPI1_NSS pins on the datasheet of the processor. What can I use as 3 CS pins? Is any GPIO pin suitable?

Resolved! STM32H7 RM0399 Rev4 FDCAN Typos?

Looks to me like the FDCAN peripheral has a few registers that are marked 'r' when they are likely 'rw' in the RM. They are the registers that configure the size of the FDCAN messages. This isn't blocking my work; only thought the ST team should know...

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OSPI skipping bytes

We have been using an STM32 U585 with additional external FLASH connected to OSPI1 and external PSRAM connected to OSPI2.  This is not on a dev kit, it is our own hardware.  The PSRAM is memory-mapped and is using the HyperBus protocol.  We have noti...

BDoon.1 by Associate II
  • 6 replies
  • 2 kudos

NUCLEO STM32U575ZI-Q USB Device CDC Problem

Hello, I am trying to use the STMicroelectronics classic USB device middleware to implement a CDC class in the STM32U575 microcontroller. I am currently working on NUCLEO-u575ZI-Q. At first, I followed the tutorial on "How to use STMicroelectronics c...

IlariaCrupi_0-1709029783341.png IlariaCrupi_1-1709029800660.png IlariaCrupi_2-1709029817595.png IlariaCrupi_4-1709029965795.png

Resolved! Disable Sink and Sorce at Startup DRP1M1

 Hello,I am using the NUCLEO-G071RB and the X-NUCLEO-DRP1M1 with the X-CUBE TXPP Software Bundle.I created my project via the instructions from

VH by Associate
  • 2 replies
  • 1 kudos

Remote wakeup on STM32F0

Trying to implement a composite HID device on STM32F042 (or maybe STM32F072 as both Flash and RAM usage seem insane), starting from the MX mouse middleware. After much scratching around it's finally working as a mouse and keyboard and I now need to a...

DMA and Direct Mode

Posted on August 07, 2013 at 21:21 I'm confused about the FIFO error flag (FEIF) when I set up DMA for direct mode transfers. As I understand it, in direct mode the FIFO is disabled. But for some reason, if I enable the FE interrupt in the DMA_S...

andprice by Associate II
  • 7 replies
  • 0 kudos