Bits 6:4 OC1M: Output compare 1 mode (Frozen - The comparison between the output compare register)
The output of TIMX_CH1 and TIMx_CH1N is decided by previous value before bits 6:4 changed to Frozen mode?
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Any STM32C5 with dedicated input pin for the inner LDO?
Hi friends,Does have processors from this family a dedicated input pin as the the input for inner LDO?It will be in the future to supply the inner LDO with the voltage Vcc/2 from the splitter like LM2665 or other.best regardszbynoB
N6 App OTA via UART, DFU or otherwise - not working for app image
We are trying to do a firmware upgrade via UART to the N6 from another MCU, and having trouble getting it working. We do not have a USB host stack on that MCU so we're unable to use USB DFU.I've successfully been able to transfer and start the FSBL t...
Clipped sine TCXO clock for STM32G031G8U6
The STM32G031G8U6 in a UFQFPN28 package does not have PF0 / PF1 pins for HSE OSC_IN / OSC_OUT. It does however have OSC_IN on PC14. This is intended for an external CMOS oscillator in bypass mode.I’m currently in the schematic design stage. My boar...
STM32N6: Debugging Issues with External Flash and RAM Debug in FSB & App
Hello,We are using the STM32N6 series MCU in our project and encountering issues during debugging. I’ve attached a screenshot of the error message we are seeing.We followed the steps outlined in this guide:https://community.st.com/t5/stm32-mcus/how-t...
How to Debug STM32N645 above 0x34200000
Hi I have setup a small project in CubeMX v6.17.0 with FSBL and an application (secure domain only). As long as I use the default Flash and RAM region, debugging works fine. ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 511K RAM (xrw) :...
Power On-Off sequence for STM32N657X0H3Q
Hello Team,We are using the internal SMPS configuration for the core power supply. However, the power-up sequence does not specify the timing requirements for the different stages.Could you please provide the timing details for the following? What sh...
Resolved! Wrong (?) description of ADCs in STM32H5E5/F5
In ds H5E5 is given: 3x 12b ADCbut on selector is shown:...so secret 3 x 16b ADC there - or error in table ?
Resolved! CAN FD network normal mode does not work with NUCLEO-C092RC boards
Hello everyone, i want to build a CAN FD network with three NUCLEO-C092RC boards. So far i can transmit frames, as i can see on an oscilloscope. But the moment i connect TWO boards, the interrupt is not triggered. My code should activate user LED2 ...
STM32N6570-DK – FSBL Peripheral Configuration, Multi-Layer Execution & External Flash Loader Issue
I am currently working on the STM32N6570-DK board and need guidance on FSBL configuration, multi-layer project structure, and external flash programming.Issue 1: FSBL Peripheral ConfigurationI enabled multiple peripherals in FSBL:USART1, I2CBSPXSPI1,...
