STM32F7xx Family Undocumented QSPI Hardware Bug

[psymo000]

Peripheral: QSPI

Bug: Bit 4 of FTHRES[4:0] in the Control Register is not set when written with threshold values in the range

0x10 - 0x1F. Works fine for threshold values in the range 0x00 - 0x0F. So, for example, if one writes 0x16 for a

threshold level of 23-bytes, the actual value is 0x06 corresponding to a threshold level of 7-bytes.

Encountered on: STM32F723IE, STM32F746NG and STM32F767ZI

Comments: Checked the errata data sheets for the above processors and there is no mention of the bug.

Request: Please can anyone confirm that this is indeed an undocumented hardware bug.

[KDJEM.1]

Hello @psymo000;

Thank you for bringing this issue to our attention.

I will check internally and get back to you as soon as possible.

Thank you.

Kaouthar

[psymo000]

This bug extends to the STM32F4 family of devices that support QSPI. Checked on a Nucleo-F446ZE board and encountered the bug. Again checked the errata data sheet for the device and there was no mention of the bug. This being the case, both STM32F Cortex-M4 and -M7 devices that support QSPI obviously use the same silicon IP for the peripheral.

It has been just over 1 month since the original post and I am stilling waiting for confirmation. Not impressed with the level of professionalism shown by STMicroelectronics with regards this matter. A very poor reflection on the company.

[KDJEM.1 · Accepted solution]

Hello @psymo000 ,

I apologize for my late reply and thank you for bringing this issue to our attention.

I confirm the issue. This behavior will be documented in the errata sheets for the impacted products.

Internal ticket number: 215366 (This is an internal tracking number and is not accessible or usable by customers).

Thank you.

Kaouthar

[psymo000]

Thank you for the confirmation.