STM32 MCUs Products

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STM32H7 FDCAN configured in CAN2.0 is not working

Hi guys i have a nucleo h7A3Zi-q dev board . i am trying to receive CAN messges sent from ESP32 borads . esp is sending can  frame by using SN65HVD232D. and i configured the FDCAN to receive the can messages . esp can is set at 500 kbits , and my stm...

b1aze_0-1765963936905.png b1aze_1-1765963951279.png
b1aze by Associate III
  • 259 Views
  • 6 replies
  • 1 kudos

Resolved! STM32F4 with DCMI

Hello, we have device with very old TFT display which is dying. New one is unable to obtain. It has similar interface as DCMI: vsync, hsync, pixclk, D0-D8.I have connected these clock/data lines to DCMI port, but interrupts was not triggered.Here are...

Screenshot 2025-12-17 182625.png DCMI.png
mm10 by Associate
  • 229 Views
  • 2 replies
  • 1 kudos

Resolved! STM32F7 Hard and Memory Faults

Hello,I am working on a hobby project with https://www.st.com/en/microcontrollers-microprocessors/stm32f767zi.html.I have my own build and development environment based on arm-gcc-none-eabi and CMake and all HAL Drivers and Libraries from STM.The boa...

DietWall by Associate
  • 352 Views
  • 20 replies
  • 4 kudos

Resolved! GPIO output pulse stability (bis)

Hello,Trying to do precise GPIO pulses with assembly code - on any STM Nucleo board - shows jitter and fluctuating frequency. I was told by a super user to do it via PWMI would like to add some comment that may be interesting for others :- trying to ...

Resolved! GPIO output pulse stability

Hello,I'm using the STM32H723 (at 550MHz) to generate pulses on a GPIO output at a certain frequency (around 4KHz)I'm generating the pulses with assembly code. I've stopped systick and interrupts. However, looking at the signal with a scope, I'm disc...

STM32 FMC SDRAM bus width 8/16/32 bit

Hello, I want to add a SDRAM chip to my board. Processing the images with internal RAM is insuficient. Reading the manual for FMC part I'm not sure how the bandwidth is working. If I have a chip with 8/16/32 bit, is pretty clear: one chip and that's ...

EasyNet by Associate III
  • 164 Views
  • 5 replies
  • 0 kudos

Quad-SPI DDR indirect read mode dummy cycles count

Hello ST community,I have some troubles with dummy cycles using Quad-SPI interface in DDR mode on STM32H743 and STM32F746.I am trying to read data from IS25LP080D QSPI flash with FAST READ QUAD IO DTR MODE OPERATION (0xED command). It is 1-4-4 mode.I...

DCYC_reg.png stm32h743.png