STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
Hi!I am learning to read the stm32f103c8t6 manual in order to be able to control the MCU without the HAL libraries. It seems that I have set up everything as it should be, but the result seems weird. If I write 0x00 to the SPI DR, I see 0x00 by the a...
I the UM211 User Manual of STM32H747I-DISCO board the CN9.1 (A0) is declared to ADC3_IN5 (Channel 5 of ADC3). I tried to configure ADC3_IN5 with STM32CubeMX but it configures ADC3_IN5 to PF3 (not PF7) pin. PF3 pin is not accessible in CN9 connector. ...
Hi, I have a question about UART + DMA.I have a sensor that needs to send data to my STM32. When the sensor is stimulated, for the duration of the event, it sends a byte approximately every 1 ms.To receive the data there are no problems, I used DMA a...
Hi there, Our application has a firmware update method that begins by erasing flash bank 2 sector by sector before writing the new firmware.RDP level is set to 0, but this shouldn't be an issue as we're only erasing a sector.Occasionally (Maybe 1 in ...
I am using SW4STM32 (an Eclipse Variant) to code and debug my firmware, which is based on sample codes in package STM32Cube_FW_F4_V1.26.0.I have observed two strange issue:IDE warns me that "Symbol '***' could not be resolved". However, it has no pro...
Hi,i write code in bare metal so every time i initialize a project in STM32CubeIDE i do it as an empty project. I made a project for STM32L011K4 and try to initialize the LPUART, in the startup file i can find that the handler for the LPUART1 name i...
Hi there,I have got an STM32H7B0 processor.I would like to make a part of the AXI (main RAM of application) not cacheable so I don't need SCB_CleanDCache() before/after DMA write/read transaction.But another part of the AXI RAM should be cacheable an...
I'd like to use one of the watchdogs on STM32F407, but I'm surprised the maximum timeout of the WWDG is so short (around 50millisecs, depending on clock speed).This is very restrictive, for example a sector erase takes much longer than this (and is a...