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STM32F7 LPSDR SDRAM initialization

Hi! I'm writing to ask help about LPSDR SDRAM configuration on STM32F7.Currently I have a board with a normal SDRAM that is working fine. The design is based on the STM32F769I-DISCOVERY and it uses the MT48LC4M32B2 Micron SDRAM.The configuration is t...

LoriB by Associate II
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Why can't I declare char? [SOLVED]

I am using STM32 Cube IDE with NUCLEO-L4P5ZGbelow is my codevoid function (int dir, int runtime){ int Run=1; int bytes_per_reading_gyro = 72; int bytes_per_reading_echo = 29; char gyro_reading[bytes_per_reading_gyro];; int echo_reading[bytes_per_rea...

SHelg.1 by Associate II
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Can the minimum voltage at inverting or non-inverting input pin of on-chip comparator of STM32-Nucleo G474RE be negative like the other IO pins have minimum value of Vss-0.3V?

Hi, I going to use on-chip comparator of STM32-Nucleo board G474RE in my application, the sensed voltage could go negative, the general operating conditions table (page 84) in the datasheet (Datasheet - STM32G474xB STM32G474xC STM32G474xE - Arm® Co...

WKhan.2 by Associate II
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STM32L151 ADC in scan mode

Hi,I'm trying to use the ADC1 of the STM32L151CBT6A in scan mode for 14 channels (with interrupt) . Depending on ADC clock and SamplingTime configuration I got only a channel on 2. If I put sampling time lower than 96 cylces (for prescaler 4) I have ...

MAlle.17 by Associate
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Resolved! QSPI TCIE self clearing? STM32H743I QSPI peripheral sometimes hangs Writing to external flash via QSPI transmit using MDMA and both MDMA and QSPI interrupts. Sometimes the QSPI peripheral gets hung up indefinitely.

With the ICD I found that sometimes, between the MDMA IRQ Handler - where the QSPI TCIE bit is set, and the QUADSPI_IRQHandler, the TCIE bit is cleared. But I haven't been able to determine where or how it is being cleared; I've eliminated all loca...

Araknai by Associate
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