Resolved! USB on-the-go high-speed (OTG_HS) - core setup confusion
In RM0456 section 73.4.3 OTG_HS core (p.3279) I found the following statement:"The OTG_HS receives the 60 MHz clock from the reset and clock controller (RCC). This is typically generated in the PLL associated with the HS PHY and enabled in the RCC. T...