is it possible not to reset the SRAM (D2 Domain) when M4 is enabled?
Hi all, Working on STM32H745: when enabling the M4 at M7 main(), the 'D2 domain' SRAMs (1,2,3) are being reset, causing issue, as the M7 and the OS are using these SRAMs, prior of the M4 enable (RCC register). Is there any option not to reset the ...