About Andreas Bolsch

Andreas Bolsch · 2023-06-06

RM0444 rev. 5, sec. 29.3.4 and RM0490 rev. 3, sec. 21.3.4 both employ only WDGTB[1:0], but WWDG_CFR description mentions WDGTB[2:0] with eight different prescaler settings. So actually two or three bits?

Andreas Bolsch · 2023-02-05

What's the difference between "LQFP32" and "LQFP 32 7x7x1.4mm"? Probably they both refer to the very same package?. A similar discrepancy appears for a lot of other packages, too. (For WLCSP it's a different matter.)

Andreas Bolsch · 2023-02-01

Andreas Bolsch · 2022-03-07

The zip-archive en.st-stm32cubeide_1.9.0_12015_20220302_0855_amd64.rpm_bundle.sh_v1.9.0.zip is apparently broken: "inflating: st-stm32cubeide_1.9.0_12015_20220302_0855_amd64.rpm_bundle.sh bad CRC dd12447e (should be c287de8a)"

Andreas Bolsch · 2021-06-17

RM0455, rev. 6, says reset state of SYSCFG_PMCR is 0x0F00 0000.But STM32H7A3ZIT6Q, rev. Z, shows 0x0300 0000 instead, i.e. PC2 and PC3 switches closed. not open. Does this depend on package as PC2 and PC3 are not bonded out for this particular packag...

Andreas Bolsch · 2023-11-18

If you're absolutely sure that neither the mcu's nor the flash's pin had been damaged (static discharge sometimes cause mysterious effects like high leakage): The errata sheet says that there is a problem with PB4. The description is rather vage, unf...

Andreas Bolsch · 2023-11-08

Did you actually *verify* the GPIO register contents (in particular MODER, OTYPE, ODR, IDR) after the calls of HAL_GPIO_Write_pin against expected contents? LCD controller used?

Andreas Bolsch · 2023-11-06

Where the update image comes from is rather irrelevant, be it network, SD-card, UART, ...But 1. with 3. is not possible as soon as parts of your application reside in the external flash. To emphasize it again: During *any* program or erase operation ...

Andreas Bolsch · 2023-11-04

Re. 1: Yes, but you have to write your own bootloader located in internal flash only (protected!) which handles receiving the file and programming it into internal flash and external one based on target address. This means that it can't be a flat bin...

Andreas Bolsch · 2023-10-14

Whether memory mapped write is supported is a question of the interface, not of the memory. So OCTOSPI *interface* allows memory mapped write, (in the first instance) regardless of the memory chip and mode (1-line, ... 8-line).BTW: Memory mapped writ...

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Inconsistency in WWDG_CFR description for STM32G0xx and STM32C0xx

Inconsistent package naming in Cube32MX - MCU Selector

STM32C0 - Errors in RM0490 Rev. 3: 26.5.3 ID is 0x0BC11477, not 0x0BB11477, 5.4.1 RCC_CR power-on reset is 0x00001540, not 0x00000500 (see register details) on rev. A device.

STM32CubeIDE 1.9.0 released - but broken archive ...

RM0455 STM32H7A/B: Reset state of SYSCFG_PMCR incorrect?

Re: STM32G431RB GPIO Open Drain (no pullup/-down) only reaches 1.2 Volt on 10k 3V3

Re: STM32L4A6 GPIO PC8 pin can't be pulled to low

Re: Executing code in external OCTO SPI-flash for H7-device?

Re: Executing code in external OCTO SPI-flash for H7-device?

Re: Where is it documented that STM32H7 can only read memory mapped QUAD-SPI RAM?