I want to try to interface a 7" 1024X600 display with the STM32F407VET6 chip. I know that the F407 does not have a LTDC so I was wondering if I could use a LCD driver chip that could be wired to the FSMC of the microcontroller. I also plan on using a...
I have Nucleo-G071RB. I want to flash the LED LD4 using CMSIS. Use IAR 8.40I'm writing the following code: GPIOA->MODER |= 0x400; (set GPIO_MODER_MODE5_0). It's not working! In the debugging window, bit 11 doesn't change and the LD4 LED doesn't switc...
I wanted implement this formula y = a*x^b on the STM32F405 processor. But can I do the power multiplication on the STM32F405. Any help on this matter. Thank you
Hi everyone,we have taken over the further development and support of a board containing a STM32F407. The board contains a USB port, connected to PA11/PA12, Reset and BOOT0 are connected to push-buttons. So a firmware upgrade by means of the STM32Cub...
It says "It is crucial that you use a consistent set of versions for the CMSIS Core - CMSIS Device, as mentioned in this release note." but I do not see any CMSIS version in the release notes. Which CMSIS version is recommended for cmsis_device_f3 ?...
According to AN2606 section 12 we can use USB DFU bootloader as long we have HSE using a 24, 18, 16, 12, 8, 6, 4 MHz crystal. This is missing from section 3.3 of the datasheet. Is there a reason for this?
Hello,I am currently evaluating the STM32H562 device. This devices has an ICACHE (instruction cache) module.Does it make sense to enable both, the ICACHE module and the FLASH prefetch buffer? In the past I already worked with the G0, G4 and F4 series...
I'm attempting to interface an STM32G473 with a VESC motor controller using CAN.I am successfully receiving status frames from the VESC controller, but when I transmit a frame to command it, the ID my scope reads in the frame is not always the same a...
The new STM32L4R9 svd file (version 2.0) has renamedTIM1_OR2 to TIM1_AF1,TIM1_OR3 to TIM1_AF2Removed TIM1_OR1 which is in the reference manual containing ETR_ADC1_RMP and TI_RMPAdded a new TIM1_TISEL at offset 0x68 which is not in the current referen...
I am using all 3 ADCs on an F765 to convert 16 channels of data at 50 ksps. Each ADC is configured to perform a sequence of conversions (5 on ADC1 and ADC2, 6 on ADC3), all triggered from the same timer. I have also configured them to ping-pong the d...
