ETH_REF_CLK (PA1) noise / crosstalk on ADC1_IN0 (PA0)?
Hello,Has anyone seen ADC noise generated by the 50 MHz RMII clock (PA1) affecting the measurement on ADC1_IN0 (PA0)? (approximately 100 codes in 4096).If so does anyone had a fix to suppress it?All other ADC channels used do not have the same level ...