STM32 MCUs Products

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keypad 3x4 rs 130404

Posted on March 02, 2013 at 23:19 Hi, i try to use a keypad with my stm32vldiscovery but it doesn't work can u help me? i connect first 4 pin to stm32vldiscovery in PA0-PA1-PA2-PA3 in output open drain, and last 3 pin to PA4-PA5-PA6 as analo...

Minor error in stm32f4x7_eth.h (ethernet)

Posted on March 03, 2013 at 10:14In the header file ''stm32f4x7_eth.h'' bit 0 of RDES0 is defined thus:/*!< Rx MAC Address/Payload Checksum Error: Rx MAC address matched/ Rx Payload Checksum Error */#define ETH_DMARxDesc_MAMPCE      ((uint32_t)0x000...

UART4 on STM32F417

Posted on March 01, 2013 at 16:25Hi Guys, After reading the whole of Google and finding this thread (https://my.st.com/public/STe2ecommunities/mcu/Lists/STM32Discovery/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2FSTM32Discovery%...

Delay function with timer

Posted on February 22, 2013 at 09:12Hi, I am trying to make a simple delay function using a timer but i get weird results .Here is some of the code void TIMERS_init(){   TIM3->PSC = 23999; // f timer = fclk / 24000 => 1kHz TIM3->ARR = 0xFFFF; TIM3->...

raducara by Associate II
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Vbus Detection

Posted on February 28, 2013 at 16:47Hi,I'm developing a self powered USB FS Peripheral Only Device. To detect a USB cable connection to Host I assume to use SRQINT bit in OTG_FS_GINTST register.But for some reason I can not initially clear this bit....

dimax by Senior
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Time triggered CAN

Posted on March 01, 2013 at 06:03Hello! I want to use STM32F105 in time triggered communication mode (RM0008, p637). In this mode internal counter used to capture sample point of SOF. The question is how can I use this counter: clear, read, write an...

Allocating Dynamic IP Adderss

Posted on February 27, 2013 at 12:57Hi,     Is there any way of assigning the IP address Dynamically (as it is done in the computers network configuration) im using stm32f107rb .... If it is possible then could you please tell me about that thing......

STM32F103C6 HardFault after erase flash with IWDG active

Posted on February 26, 2013 at 17:41Hi, I'm new to Cortex M3. I've a custom boot working correctly: first I erase the 32K flash and after I write the memory with no problems.I need to activate the Independent Watchdog, and when I do it the microcont...

xbalmes by Associate II
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