STM32G030 erratum 2.2.1 workaround is not reliable
Erratum 2.2.1 (Unstable LSI when it clocks RTC or CSS on LSE) indicates the following workaround:If LSI clocks the RTC or when the LSECSSON bit is set, reset the backup domain upon each VDD power up(when the BORRSTF flag is set). If VBAT is separate ...