Ask questions, find answers, and share insights on STM32 products and their technical features.
I have a product that contains 2 STM32F405/07/15/17 series MCUs. There are 2 because we need 4 CAN and that's cheaper and easier than finding a 4 CAN MCU. Anyways, the main MCU is connected to the secondary MCU via UART and the boot/reset pins so tha...
NUCLEO-F030R8 does not appear in FINDER on Mac Also the option is missing from list of ports Have sucesfully run: sudo port selfupdate && sudo port upgrade stlink However NUCLEO-F030R8 does not appear.
I am trying to understand how the ECC IRQs work. I have configure the RAMECC1 AXI SRAM, RAMECC2 SRAM1, 2 and 3, and RAMECC3 SRAM 4 monitor CR registers to generate interrupts on double bit errors. I have configured the IER so that Global interrupts...
Hi,I'm currently looking for a way to identify the MCU attahced to a common pcb used. The MCUs are from the H7 series and im geeting unexpected results, as in they all return the same id 0x450I have tried looking at the DBGMCU->IDCODE, HAL_GetDEVID()...
Hi We are working on STM32H503 MCU which has ARM Cortex 33. In datasheet it is provided that 12 cycles or instruction to enter into an interrupt function. Configured system clock as 250MHz, with that we could reach an interrupt function within...
I am trying to make an I2C slave that returns a fixed number of bytes to master upon being called with a read from the master (7Addr-Bits+1Read-Bit). In Debug-Mode it works, in normal run, it doesn't.I have thrown almost any HAL-functionality out, an...
Hi everyone,I am observing some data corruption in an external SDRAM connected to an STM32 F7 FMC peripheral and I am trying to understand what is happening and how to prevent it. Scenario:Configure the FMC to interface with a Winbond external SDRAM ...
Hello ST Community and Support Team, I try to play with Independant Watchdog and Window Watchdog on a Nucleo U575ZI eval board.I was able to configure counters, window and even EWI interrupt perfectly thanks to STM32 HAL library watchdog related func...
Heyho,I had probably some race condition, just want to make sure:the buffer switching in DMA's Double Buffer Mode (DBM) (both for DMA and BDMA) occurs immediately with the Transfer Complete (TC) interrupt?So when the DMA's TC ISR is entered (which ta...
Hello,I am using the Cube Code Generator, within the STM32CubeIDE (version 1.13.1) for an STM32H563, and have configured the Flash Data Sectors to use the maximum 8 sectors per bank for EDATA. The valid range for the EDATA sector size is 0 - 7, as sh...
