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window watchdog in stm32f103

Posted on September 02, 2015 at 22:29hi every one I'm trying to initial stm32f103rbt6's window watchdog with keil cmsis examples, every thing is OK but in reverse direction,i mean it seems external interrupt & wwdg interrupt handlers are act instead...

mhdizgah by Associate II
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Barracuda App Server for 32F746GDISCOVERY

Posted on September 02, 2015 at 21:56Barracuda Application Server Demo for the Discovery Board(32F746GDISCOVERY)The Barracuda Application Server Demo includes a web based code editor, where you can develop your server side web application directly i...

wilfred by Associate
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STM32 SPI Spoiled Bits

Posted on October 06, 2014 at 13:11 Hello, I have a problem trying to communicate with SPI using the STM32 Nucleo. I am using the STM_HAL_Drivers to read data from an Invensense MPU9 When I read values, I sometimes get spoilage of the la...

0901123w by Associate II
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STM32F4Discovery SPI1 last bit problem

Posted on September 01, 2015 at 10:35Hello,I have a problem  with SPI1 using the STM32F4Discovery. The STM HAL(STM32Cube_FW_F4_V1.5.0 and V1.7.0  ) driver is used. When I use HAL_SPI_Transmit (master mode, bidirectional) last bit in returned byte is...

alevstiv by Associate II
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How to enable L1 cache on the stm32f746

Posted on September 02, 2015 at 18:32Hello. I want to enable L1 cache on the stm32f746 controller. In examples from STM32CubeF7 i found that memory protection unit enabled at first and then L1 cache. Is it necessary to enable MPU before L1 cache?

[solved]HAL_SPI_TransmitReceive not workin

Posted on July 09, 2015 at 11:40device stm32f0discovery stm32f051r8t6even if I get SPI2->DR = 0x9C which is correct.I even look with saleae logic analyzer.HAL_SPI_TransmitReceive function does not write to rx variable I created.Thanks for any help

aaslan by Associate II
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