Posted on October 23, 2015 at 17:42Hello, I've got an STM32F746 here and I want to use SPI1, SPI2 and SPI4 in parallel with DMA. For each, one DMA channel pushes data into DR by a timer request, and another listens for a SPI_RX and forwards to memor...

Posted on October 20, 2015 at 18:18Hello Community! I would like to know how, where, and on what conditions the DMA safety is ensured in STM32F7 HAL drivers and how DTCM is considered in them. I've generated a Cube-Project with freeRTOS for SystemsW...

Posted on April 18, 2015 at 23:12I can't figure out the cause of the Hard Fault: Chip: STM32F405RG Instruction (gcc generated program): vldr s0, [r4] r4 contains an address in the main RAM and aligned (0x2....4) Stepping over it results in a jump to...