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QuotePost[EDIT] displaying the values of the registers works on STM32duino arduino consoleHi ,I am in the arduino world ; for some more particular tasks , the existing API is not enough , so I have to write my own code and debug itI am trying to spy...
Hi Sir,I'd like to choose STM32F103V/R/Z to achieve the USB to 4UART and I2C in my system.Because it's said this MCU's USB support up to 8 bidrectional end ports. I don't know whether it's right or not.Could you help to review it or propose another s...
How can you write a program that updates itself for an STM32, eg. for an STM32F103C8?I'm not talking about a bootloader, since (as far as I know), a bootloader lives from (say) 0x08000000 to 0x08001000 in Flash and then updates another program (anoth...
Hello,I'm using two STM32F4 nucleo boards and my goal is to transmit data unidirectionnaly from one board to another using SPI in a loop.The first board is configured as a Master and it only transmits data. And the second one is configured as a Slave...
After setting configuration registers in HAL_DMA_Start_IT, DMA fails to fire back interrupt, HAL_DMA_IRQHandler(). The TransferComplete call back routine is not called but only once after reset since HAL_DMA_IRQHandler() is called only once after ini...
We are not using SMPS functionality of STM32H747AII MCU. Can we left VDDSMPS, VFBSMPS, VLXSMPS pins unconnected?
MCU: STM32H753VI Scenario:Requirements specify that I must use internal flash memory to store error counters for our fault management system. I was going to directly write to flash memory using the built in HAL commands, but found that most people se...
Posted on June 28, 2017 at 14:27Hi all,i have two custom board with a microcontroller STM32F401CC in a 48pin package. One of these two micro is not working anymore due to a programmed option byte during a debug session. ST-link tell me this micro ha...
Hi Friends,In STM32H7 MCU, both M7 and M4 can access shared memory, such as D3 SRAM4. I am going to use a D3 SRAM4 address as a place to share some status information between M7 and M4. If a 32bits word is defined shown as below, can the access from...
The reference manual RM0503 rev2 has inconsistent information about the flash wait states.Table 9 in §3.3.4 shows three options: 0WS, 1WS, 2WS (and, by the way, it says that all three of them correspond to "1 CPU cycle", which seems wrong).Instead, §...
