STMCubeMX 4.18.0 generates incorrect PLL timing
Posted on December 05, 2016 at 21:55I am using STMCubeMX 4.18.0 configured for STM32F446ZET. When I set Clock Configuration HCLK to 180 the following lines in main.c cause the processor to hang: RCC_OscInitStruct.PLL.PLLM = 4; RCC_OscInitStruct.PL...