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There is the Figure 80 "DMAMUX block diagram" in the STM32F743 Reference Manual (RM0433), which shows that there is 'm' number of dmamux_evt signals, where 'm' is 16 for DMAMUX1 (the number of DMAMUX1_CmCR channels).The Manual only describes the dest...
HAL_I2C_Mem_Read(I2C_HandleTypeDef, Address, REGUSTER, rsz, buff, bsz, tout);If the device address is 0x77,what is th proper way. I can find non consistent answers, though i cannot read. I get HAL_ERORis it:Anyway each option returns non consistent d...
Hi,I suspect that I encountered with undocumented silicon error of STM32L432KC, while I'm playing with a Nucleo32-L432KC board. Here is how to reproduce it:Start a new project with CubeMX v.4.27.0Select SPI1 as a full duplex master(PA1:SCK, PA6:MISO,...
Is there a way to retrieve the value APBx timer clocks are set to?I have found functions to get the PCLK1 and PCLK2 frequencies but there is a multiplier that can change the final timer clock so that is not reliable.
I am able to receive only 0x0D in receive buffer, but I can see different data in Receive string.Please can someone help me..unsigned char i = 0, k = 0; //HAL_GPIO_WritePin(GPIOC, GPIO_PIN_2, GPIO_PIN_SET); //Switch ON GSM LDO __HAL_UART_ENABLE_IT(&h...
Hello.I want to use AS4C8M32SA-6BIN ( https://www.alliancememory.com/wp-content/uploads/pdf/dram/Alliance%20Memory_256M%20SDRAM_AS4C8M32SA-6_7BIN(BCN)%20A%20die_rev%201.0%20November%202016.pdf )But I can't pick up the settings.The names in HAL and th...
I've been reviewing AN5027 (Interfacing PDM digital microphones using STM32) and am a little unclear about a 4x2ch mic configuration using 4 of the SPI/I2S peripherals available on the F412.Looking at the figure below, could I connect all 4 stereo pa...
Posted on March 07, 2018 at 13:57My hardware is STM32F429ZI6 and LCD.External ram or etc no other hardware.Is fsmc and fmc different?Is that valid this data for the command stm32f429?#define LCD_REG (*((volatile unsigned short *) 0x60000000)) #defi...
I have LCD connected to FSMC, 16bit parallel interface.It works, but all signals are twice slower.SYSCLK is 120MHz (checked using MCO), HCLK divider is 1 (checked with debugger).Timers TIM2, TIM3 and TIM4 give expected results, so the system clocks ...
