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F7 SDRAM CubeMX setup no DMA tab

The SDRAM HAL module has DMA functions but there is no tab in CubeMX to set up a mem2mem DMA channel. This is with CubemX 4.27.0. Is the DMA a pre-requisite for LTDC operation or does it use it's own internal memory access.

Temperature compensation on ADC?

Posted on August 11, 2017 at 05:02Hello, I am using an Olimex-E407 board to measure some signals (AC signals). After some reading on ADCs I learned that there are a few error that have to be taken into consideration when doing measurements and some ...

App fails when source is changed in a trivial way.

Hi,I've been playing around and refactoring a small test app for the STM32F769 DISCO board. The app runs fine and I retest after even the smallest code tweak.What I'm seeing is that physical position of the function SysTick_Handler within the source ...

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Resolved! Understanding serial IO misbehavior

I've been trying to adapt an example piece of code that utilizes a UART from the Visual GDB website. The adaptations are:Using an STM32F769 Discovery board.Communicate with an ESP8266 device plugged into the board's WiFi socket.I managed to work out ...

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LTDC maximum display resolution documentation inconsistency?

Posted on January 10, 2018 at 02:34HiAN4861 (http://www.st.com/content/ccc/resource/technical/document/application_note/group0/25/ca/f9/b4/ae/fc/4e/1e/DM00287603/files/DM00287603.pdf/jcr:content/translations/en.DM00287603.pdf) page 25 states that th...

luke23 by Associate III
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Sram to GPIO 8 bit transfer using DMA

Hello,I am a student of electrical engineering and I'm now starting a project where I need to use the stm32 architecture.The idea is to use a NUCLEO-H743ZI board and to connect 8bits of the GPIO to a VGA Cable and display a 640x480 60Hz 256 colors i...

JGon? by Associate
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stm32l452, uart, when TXE = 1 ?

stm32l452, uart. CR1_TE is = 1, now I set CR1_TXEIE = 1. Is ISR-TXE = 1 (and INT generated) now too? Or really only if 'data is transferred to the shift register' ?

bso by Associate
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Resolved! STM32L4R9 GPIO13, 14, 15 EXTI interrupt problem

I think I've caused some problem in the way I'm coding this interrupt. For a second I thought it was a pipeline re-entry problem like Clive-Two-Zero described in a different thread, but adding a volatile variable and incrementing it, didn't seem to w...

Du1 by Senior
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