STM32L432R DAC1 out2 configuration
the DAC1 out1 working fine as programmed bt DAC1 out2 is not. Is it due to bridge18 A4 to D4, should I remove bridge. I try setup D4 as Analog and Digital IN and does not helped. Is STN32L$#@RC damaged on out2?
Ask questions, find answers, and share insights on STM32 products and their technical features.
the DAC1 out1 working fine as programmed bt DAC1 out2 is not. Is it due to bridge18 A4 to D4, should I remove bridge. I try setup D4 as Analog and Digital IN and does not helped. Is STN32L$#@RC damaged on out2?
Hi,I have a single adc channel where i read the input values through polling, but it always outputs the max value or almost max value (~ 65280+) as long the input voltage value is greater than zero (v0.5+ ). i configured VREF+ to internal voltage ref...
The 'F427 (437/429/439 "BigManta") is pretty much completely backward compatible, meaning, that a reasonably well written 'F405/407 program (i.e. which does not touch the bits reserved in 'F405/407) binary will run unmodified in the 'F427. There are ...
Hello,I am trying to erase/flash program an external W25X40CLSNIG flash chip with various STM32L4xx host chips using SPI protocol. Up until now I have been referencing STM32l4xx_hal_spi.c source file for ways to perform such a task but was curious if...
I am using ADC1 and ADC2 of STM32F446RE, which are operated under the following conditions;Dual ADC modeRegular Simultaneous modeExternal triggerI can correctly read the converted values through ADC1->DR and ADC2->DR.However, I can not read the corr...
The SWO/TRACESWO with Instrumentation Trace Macro cell should be able to extract information about what instructions or addresses were executed.However I still can't find the right tool to do it.It would be enough for now to show the addresses the PC...
Hi all,I would like to boot a RAM image. A simple bootloader in flash reads in a linear binary from external spi flash. The RAM image works fine if I load it directly to (AXI)RAM (with JTAG).But when loaded by the boot loader, it does not work (loops...
------------------------------------------------------------------The init of RCC was correct. The SystemCoreClock variable dont reflect the new frecuency changes still "SystemCoreClockUpdate" is called.-----------------------------------------------...
Some time ago I tried your STM-STUDIO: I found it very rough and can only be used for laboratory debugging.Why don't you plan to build a more flexible debugger that can then be used by the end customer to view internal data or change parameters?If yo...
Currently I am trying to configure a second interrupt pin using CMSIS.SYSCFG->EXTICR[1] = (SYSCFG->EXTICR[1] & ~SYSCFG_EXTICR2_EXTI6)|(0b0000 << SYSCFG_EXTICR2_EXTI6_Pos); EXTI->FTSR = EXTI_FTSR_TR6; EXTI->RTSR = EXTI_RTSR_TR6; EXTI->IMR = EXTI_IMR_M...