STM32 MCUs Products

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Forum Posts

RAM retention between resets.

Hello,How do I retain a RAM section from bearing filled with '0' between resets.Suppose I have a pointer to 256 bytes buffer that I'd like to preserve between resets (as long as the power was not disconnected), could you please guide me, step by ste...

EMich by Associate II
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  • 2 replies
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ADC reading three channels

Hi,I would like to create an ADC driver for reading three channels, but I don't understand how I can read the single risult. I wrote a driver that read one channel (As you can see in attached file), What are the istructions for adding others channels...

LBern.1 by Associate
  • 553 Views
  • 0 replies
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stm32F407, stm32F072 and CAN bus

hello, i am trying to connect a stm32F407 and stm32F072 via CAN bus. but i cnt manage to get it done. i successfully connected two F407 via CAN bus and i used the same code for both of the boards . both of them transmitt the data perfectally but none...

SGUIG.1 by Associate II
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N-pulse waveform generation application example - part2 (AN4776)

Hi .I have problem with this back to back timer configuration . (in AN4776)What I get :1- Timer 1 is making PWM ( i just need a regular pwm but this examle is a complementary one )2-Timer 1 will send a trigger to timer2( which is it's controller acut...

0693W000001pLJoQAM.png
M N by Associate II
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  • 6 replies
  • 0 kudos

STM32G474 ADC Master-Slave

I am slightly confused with the ADC Master - Slave configuration. Maybe someone can shed a bit of light in here.Using a STM32G474RET (LQFP64), thinking of chaining ADC1 and 2 in a master/slave configuration. Looking at the attached schematic, PB1 and...

Resolved! STM32F446 synced timers with phase shift

Hello,I'm using a Nucleo F446ZE to test timer capabilities to make a peak-and-hold PWM driver. I already have the core functionality where TIM1 uses DMA to run through a buffer of variable duty cycles at a higher frequency (e.g. 5 kHz) for the high-s...

0693W000001pLB1QAM.png