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Hello,I'm a bit confused about stack management on Cortex M7.In my SW I only use the MSP.I understood that the MSP can only be modified with a MSR instruction. However the SP can be modified with a "simple" LDR instruction.Does that mean that when I ...
The notion of group priority and subpriority is not very clear in the STM32H7 programming manual.First the manual states that: According to the value of the register AIRCR (0xFA050000) the splitting between group priority and subpriority for interrup...
We don't understand the bit SCUEN of STM32H7. The description is not very clear:   Could you explain what SCUEN means and if the software is supposed to write or read this bit and why ?
Hello,I've got some questions about STM32H753 PLL setting. 1) There are many configurations of M, N and P parameters that give the same output clock. Are there some configurations that are more precise than others (regarding the output clock) ? 2) Th...
 In the context of functional safety application, we are wondering the probability of a status bit failure on a STM32H753.A low-level software is frequently polling on status bits of peripherals. If this peripheral encounter a failure this is obvious...
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