STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
hello everyone,can someone help me please, I can't understand why I can't receive 7, it's weird... I sent 7 , i want to receive 7, but I receive 255, 0, 15.. all the values except 7, that's really insane.
These are the CAN error codes listed in RM0008 (Manual for STM32F1)Is there anywhere in documentation that says what they actually mean in detail? Are these detected on RX or TX. I assume that in this case its TX and, while active an error frame will...
Hello Community, I am using STM32L432KC. This MCU has parity bit protection for 16Kb of SRAM2 memory. Where are the memory's parity bits stored? Is it possible to access them? In the manuals explanations are quite short, just describing basic stuff. ...
I need a unique ID and expected to use the 96 bit one from the chip. Then I read that STM32F070x6/B do not have it. Very disappointing, but I looked at the F0 location 0x1ffff7ac and sure enough there is something that looks exactly like a described ...
I'm working with the STM32L152. I have a USB port which has a detect signal connected to an IO pin. When the USB plug is inserted or removed the detect pin changes state. On some occasions the signal is missed. Looking at the signal on the scope sho...
After spending some time looking into the R9 I decided to make the switch. I've been developing on the 76 for a while now. I read the migration document and it doesn't look like there are any differences.Right now I'm having issues with spi and sd c...
I have a problem with setting up SPI1 in Master mode using the following code. I set the SSM bit to enable software slave management, but when I try to enable the SPI by setting the SPE bit, the MSTR bit is cleared.Thanks for help.JaroslavRCC->APB2EN...
Hello guys, I was working with this code with no problem. I changed a couple of things in main.c and then removed it because it didn't work. Now, when I am copy and past the source code to the same folder again, I get this error and can not compile i...