STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
I have an custom STM32H743 TQFP100 board. I use I2C 4, PB8, PB9 at 100kHz.The code is generated with CubeIDE.The I2C_FLAG_AF flag on I2C4 is always wrongly set and the transmission after adress is aborted.The device sends an acknowledge.Is this an bu...
We are trying to use SPI1 as a slave to receive 11 bytes of data per transaction. I.E. SPI1_RX --> my_data_array[11] When an 11-byte transaction is received, we want the DMA to raise a flag that we will check (we can't afford to use interrupts, a...
The TIM12 update interrupt is not occurred in TIM8_UP_TIM13_IRQHandler().However it is occurred in TIM8_TRG_COM_TIM14_IRQHandler()I configured TIM12 update interrupt as below;//TIM4: master -> TIM12: slavevoid MX_Test_TIM4_TIM12(void) { NVIC_Enable...
I am using STM32F439NIHx MCU. After flashing the code, I removed ST-Link V2 from my PCand restart the MCU but our application is not working. But if I connect ST-Link V2 to my pc then my application is working. What is this problem? Please suggest a...
I have been using TrueSTUDIO for about 2 months and so far when I hover over a variable in stopped code the value is reported as expected. But today I had a bout with TrueSTUDIO where many of the checked variables contained unbelievable values. Howev...
I have a feeling i know the answer to this is "just give it up" but I figure before I do that, has anyone managed to get this Atollic thing working with semihosting and the J-Link? I ran up against Atollic's libnosys.lib defining _lseek and some othe...
I am using the H7 and have a 10MHz sigma-delta ADC sending the Manchester signal. I do not have a clock going to the ADC because it generates its own.The internal DFSDM clock is set correctly, I think. I have a system clock of 96MHz and CKOUTDIV is s...
Hello,I'm confused about the documentation of the (Re)Synchronization Jump Width SJW for FDCAN in the RM0440 of STM32G4. There is a difference in docu for valid values for SJW between section "43.3.1 Bit Timing": one to four quantasection "43.4.7 FDC...
