I'm trying to erase the entire eMMC chip using an STM32F405.I send CMD35+CMD36+CMD38 and get the expected R1 response from all 3 commands. After CMD38, the D0 line goes low to indicate the chip is busy erasing. About 1000 SDIO clocks after CMD38, the...
ST10F276 ( 144 pins, 512 Byte Flash, 320K Byte Xflash) has integrated with DSP and MAC, what the purpose of it? any special application for such configuration? which STM 32 bits MCU have same construction? thanks.
There is a function called HardFault_Handler in the STM32 MCUs (full code below). This function I usually work with when debugging but am unsure how to use this for handling error. What is the correct protocol to handle errors in this function? If a ...
Executing this code sequence on a STM32H743ZI or STM32H743IIRCC->AHB3ENR |= RCC_AHB3ENR_QSPIEN; QUADSPI->CR = QUADSPI_CR_EN; QUADSPI->CCR = QUADSPI_CCR_FMODE_0 | QUADSPI_CCR_IMODE_0; QUADSPI->DR;i.e. indirect read with only an instruction phase, t...
We are using an STM32H743ZI in our application and just got the first prototypes. I was using a current limited power supply for initial test to protect the circuitry, however, something has caused two micros to fail so far after only a few power on ...
STM32F302K8 here. According to the manual, there is a flag in the ISR to see if the bus is busy, but it does not generate an interrupt when cleared. Also the STOP condition says it is only generated while you are the master and generate it, or are ...
I'm using STM32L0 series which contain EEPROM. I'm thinking of replace it with STM32G0 series. As long as I read STM32G0 series docs, there is not EEPROM. Is this true?
Appending more details here,Configured TIM2 as counter. Below is the TIM2_INit code,static void MX_TIM2_Init(void){ TIM_SlaveConfigTypeDef sSlaveConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; htim2.Instance = TIM2; htim2.Init.Prescaler = ...
