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Error in my DAC config I can't figgure out

Hi,I enabled the DAC and a GPIO Pin as analog. But whatever value I provide, the GPIO Pin of the DAC never reaches a value above 20mV. DAC config:static void MX_DAC1_Init(void) {   /* USER CODE BEGIN DAC1_Init 0 */   /* USER CODE END DAC1_Init 0 ...

Manchester using DFSDM

A lot of documents report that is possible to use DFSDM to encode and decode Manchester.Unfortunately i'm not able to find any example code.Any suggestion?

LMore.2 by Associate III
  • 1437 Views
  • 6 replies
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STM32 Blue Pill boot jumper not working

Hello everyone!Problem 1:I bought 8 STM32 Blue Pill cards.I can't program these cards.The problem occurs on all boards.When I set the BOOT jumper 0 to 1 and press the reset button the LED connected to the PC13 pin always flashes.I have already progra...

GBamb.216 by Associate II
  • 6295 Views
  • 15 replies
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Resolved! STM32F4 Is this BUG? I2S LOOP BACK TEST FAILS in 24Bit Mode. Crush DMA pointer etc. (source code attached)

I wrote I2S Loop back test program. I2S2 as Master Transfer mode and I2S3 as Slave Receive mode. (Proto for ADC in and DAC out.)It works OK when 16bit in 16bit frame. However, in 24 bit in 32bit frame, DMA pointer etc. are corrupted.With step-by-ste...

KAJIK.1 by Associate III
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  • 8 replies
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Resolved! Timer interrupt triggers immediately after interrupt enabled

Hello all,I want to disable the timer interrupt in the IRQ Handler and then enable again in the main loop. However the interrupt is triggered nearly immediately after I re-enable the interrupt (setting the UIE bit). I attached my code below. If I dis...

vtran1 by Associate II
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  • 3 replies
  • 0 kudos

More about STM32H747 ADC

I have an STM32H747i-Disco board and looking at the ADC example (which I have compiled and ran successfully)The example uses channel 18 and GPIO PA0_4 as both master and slave ADC inputs.I would like to use PA0_C and PA1_C as the two ADC inputs but I...

AStew.1 by Associate II
  • 974 Views
  • 3 replies
  • 0 kudos

STM32H755 SDMMC1 and PLL1Q provides unstable clock signal

Hi,I'm attaching a picture of my clock configuration and Logic Analyzer (Saleae Logic Pro 8) so it is easier to see what I'm doing.I have set the SDMMC clock divide factor to 1 in the configuration tab, which should produce a divide factor of 2 in th...

TOlli by Senior
  • 1941 Views
  • 3 replies
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Resolved! Cannot configure VREF on Nucleo-64 STM32G474RE

Hi,Using STM32G474RE board (Nucleo-64). I have tried a lot of different things to configure VREFBUF and none of them have any effect.I'm outputting two voltages on DAC1 at 75% scale and 25% scale and they are always relative to approx 3.25V (which is...

TThai.1 by Associate
  • 818 Views
  • 1 replies
  • 1 kudos