Hi,I am working with a STM32F7 and I am setting write protection in some memory sectors.If, for any reason, a reset occurs (SW or HW reset) or there is a power outage while the write protection is being configured (around 300ms time window), the whol...
I'm going back to basics with the uSD so I bought the Adafruit shield required for the example that comes with the CubeF7. Well it runs a few lines of code and then locks up and STLink wont connect! Any clues as to what to look at or what's going wro...
Hi,we are using STM32f373, with VBAT powering by Li 3V battery, when we disconnect VDD (3.3V), the current consumption from the battery is 1uA, when we supply VDD, the current consumption jump to 29uA. in "run mode" (VDD supplied) If we disconnect ...
Hello,Is it possible to use the LSE clock 32.768 KHz as external clock source for TIMxx on the STM32L4 series ?I have an application running on STM32L1 and using external ****-source mode 2 for TIM10 as described in Figure 131 of the Reference Manual...
I coding in C/C++, and using SPI function through 'HAL_SPI_Transmit' and 'HAL_SPI_Receive'.TPM module send me only 'ff ff ff ff ... ff ff'.i see the tpm module's manual, but i can't understand.plz, tell me a few example code.
Hi,We have use STM32L496 controller, can I interface external SRAM or pSRAM on QSPI pins?If not, what is the other option for accessing the external SRAM.
Hi ,Ive started configuring gpio's and ADC with stm32f103 in Assembly ,Can somone tell me the basic procedure to setup ADC interrupts ?? .There's alot to keep in mind while setting up the initialization and i've failed at it.
Hi programmer Master,I used two ADC of PC2 & PC2_C to capture input voltage 1.8V & 3.3V in different channel, but it always got the same data no matter what it used which ADC channel. Even though, I checked SYSCFG_PMCR PC2SO: PC2 Switch Open(RM0399 ...
I am planning to connect a LSE 32kHz crystal and a 25MHz crystal to the HSE input, but I am having a hard time identifying whether the STM will drive my crystal selection within the limits of the 100uW drive level. I have read thru the app note, but ...
Hi folks,Today I discovered a nasty little change in the clock handling of the ADC converter. It turns out that between revision Y and revision V of the STM32H7 they fixed ADC conversion problems by inserting a /2 clock divider between fADC and the A...
