Table 226 on page 906 has an entry HRTIM_TIMxCMP1CR <- I don't think this is a real register.Section 27.3.8, page 888 second line in last paragraph says "any of the 5 timers". I think that should be 6 timers.Section 27.5.66, page 1050 says Bits 31:0 ...
Hello. I was working on example generated by cubeMX (new version) on STM32L562VET6Q processor and canbus.Example code of networking worked just fine, but copying code to my LL based project made CANBUS inoperable.I was able to track down what is diff...
RM0376 Reference manual for STM32L0x2 DocID025941 Rev 5 states in 14.9 "Temperature sensor and internal reference voltage" :The following formula gives the actual VDDA voltage supplying the device: VDDA = 3 V x VREFINT_CAL / VREFINT_DATAThis can't be...
On my STM32L151CB-A (external PCB), the following issue is occurring when using the internal Real Time Clock:I configure Date, Time and Alarm A using the initialization routines generated by CubeMX. The Alarm A is set to trigger 7 seconds after the b...
hi, all. I wanted to ask about The pipeline stages in the m cortex processors , i read that m0 has 3 stages and m0+ has 2 , which renders it more efficient , can anyone explain what that means?
The F4 board worked fine doing UART DMA. I start to regret this upgrade.Forget DMA and IT for now, just trying to get F7 polling working.First HAL_UART_Receive works, but the rest time out.Register analysis is unenlightening going by RM0385 referen...
I am using the core cycle counter to measure the read and write transfer speed of the QSPI flash memory. I am writing a 128,000 byte array and reading it. I calculate 690,000 B/s to write the flash and about 1.2 MB/s to read it. Does this sound about...
had anyone have the experience of <string.h> functions stop working and prevent the whole programm to proceed?
