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TIM4 is a master, TIM3 is a slave. Given the same values I expected their respective CCx IRQ to fire at about the same time.

Set up TIM4 to generate a hsync pulse of 2us RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); TIM_Cmd(TIM4, DISABLE); TIM_TimeBaseInitTypeDef timerInitStructure; timerInitStructure.TIM_Prescaler = 0; timerInitStructure.TIM_CounterMode = TIM_...

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Resolved! Build server vendors (CI/CD) for STM32?

I'm looking for any potential vendors where I could host a cloud VM for doing automated STM32 builds coupled with some infrastructure for managing releases? Any recommendations?

AVoel.1 by Associate III
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Custom loader internal & qspi possible?

Is it possible to write a custom loader (.stldr) for internal and external (qspi) flash? If so, any tips?I'm following this guide:https://www.st.com/content/st_com/en/support/learning/stm32-education/stm32-moocs/external_QSPI_loader.htmlThis is a tou...

Kvan .3 by Associate
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Config of differential SDADCs in STM32F373

Hello all,I thought this is a straight forward thing but for me it turned out not to be...What I want to do is simply using SDADC1 and SDADC2 and perform a regular conversation at a time in multimode. I configured both in CubeMX and tried to sample b...

Bench by Associate III
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Preprocessor Macro calculation

Hi, I have a question about preprocessor C. When I define macros like:#define CON_A 10 #define CON_B 5.6 #define CON_C 20.896 #define MY_MACRO (((10* CON_A)/CON_C)*CON_B)The last one is precalculated by the compiler or is just plain replaced as it...

What is the correct procedure to recover an STM32L4x that has been put in Shutdown and experiences a brown out or POR. it shows the correct flags after reset, but the same flags appear after subsequent Shutdown periods.

This is the sequence of events:Enter Shutdown with RTC Wake up timer enabled (5 seconds)Brown out, remove and restore powerPOR Reset occurs, correct PWR->CSR = 0x0C000600Clear CSR flags by writing 1 to RMVF in CSRRead CSR flags and confirm they are c...

dtrae.1 by Associate II
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