STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
I have noticed some very strange behavior with the I2C controller. It appears that when it has a slave address match, it sets the ADDR ISR flag and raises an interrupt ( if enabled ). If I have a breakpoint in the interrupt handler, the ISR BUSY fl...
https://www.st.com/en/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus.html#resource tells that REV 3 is available. However the version that I can download is still Rev.2
I've been struggling for quite a while now on my SPI setup.The setup is as follows:- SPI Slave is a Nucleo STM32H743 in simplex mode, clocks at maximum (sysclk 400MHz, hclck 200Mhz, APB clock 100MHz)- SPI master is another identical Nucleo in simplex...
Hello. I have the following scheme for reading the output of humidity sensor that communicates via I2C:How would I execute this sequence with STM32CubeMX IDE and HAL libraries? The output of the sensor is as follows: All I have now is this code: uint...
I'm trying to erase the entire eMMC chip using an STM32F405.I send CMD35+CMD36+CMD38 and get the expected R1 response from all 3 commands. After CMD38, the D0 line goes low to indicate the chip is busy erasing. About 1000 SDIO clocks after CMD38, the...
ST10F276 ( 144 pins, 512 Byte Flash, 320K Byte Xflash) has integrated with DSP and MAC, what the purpose of it? any special application for such configuration? which STM 32 bits MCU have same construction? thanks.
There is a function called HardFault_Handler in the STM32 MCUs (full code below). This function I usually work with when debugging but am unsure how to use this for handling error. What is the correct protocol to handle errors in this function? If a ...
Executing this code sequence on a STM32H743ZI or STM32H743IIRCC->AHB3ENR |= RCC_AHB3ENR_QSPIEN; QUADSPI->CR = QUADSPI_CR_EN; QUADSPI->CCR = QUADSPI_CCR_FMODE_0 | QUADSPI_CCR_IMODE_0; QUADSPI->DR;i.e. indirect read with only an instruction phase, t...
We are using an STM32H743ZI in our application and just got the first prototypes. I was using a current limited power supply for initial test to protect the circuitry, however, something has caused two micros to fail so far after only a few power on ...