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Hello, I am looking to evaluate Cortex-M33 based controller for wifi connectivity use case. I found NUCLEO-L552ZE board. Does it support Wifi with any add-shield? or Do you suggest any other evaluation board with Arm security extension which would be...
Hi,I'm migrating a project from STM32F7 to STM32H7, and I'm hitting some roadblocks wrt DMA and the FMC.When I was using an F7, I was doing this to initialise the FMC, and it worked perfectly:/** * @brief Initializes SDRAM MSP. * @param hsdram:...
I ask the question as I have actually flash to binary on my stm32 via Keil, I have a loader and an application. Is there some tool to flash both in one instance?
I am working on a old code written by someone (without a design document). The application requires reading 13 ADC channels roughly at 8k samples per second. The read valuesare written in two buffers in double buffer mode (4096 each).The ADC is imple...
I was playing with SDRAM and found a very strange cache behavior. Can anyone help me understand what is happening?I am using STM32F7508-DK board. The SDRAM is connected with FMC.I am basically going over a small 2-d tile inside a 2-d array. The tile ...
I am using STM32F7508-DK and using Ext Flash connected to QSPI. It is mapped to 0x90000000~ region which is by default covered with cache, but for some reason, it seems like it is not benefitting as much compared to on-chip SRAM or SDRAM connected wi...
Hello everybody! I need to store dataset into the RAM of my MCU. I use STM32H755ZIT6, Dual Core M7+M4. The problem is that when I define buffer for my data the ram will overflow. The Ram size is 1MB but the whole data set's size is around 250KB. it s...
I'm using a Nucleo L476RG board, and configured the DAC output channels 1 and 2 using Cube IDE (normal mode, output buffer enabled, factory trimming). I measured VDD to be 3.378 V with a DMM. Both DAC channel outputs saturate with no load connected b...
I need to measure a signal that arrives on the board through a 100K resistor. I am trying to avoid having to add an operational amplifier to buffer it before the ADC input. I could use a bit of help understanding what the data sheet says about the ...
int USART2_Write(int ch){ //wait for TX buffer empty while (!(USART2->SR & USART_SR_TXE)) {} USART2->DR = ch; return 0; } int USART2_Read(void) { while (!(USART2->SR & USART_SR_RXNE)) {} return USART2->DR; } #ifdef __GNUC__ #define PUTCHAR...
