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Hi guys,I hope you can help me with this one:In approximately 1 out of 100 devices we have some strange behaviour which ultimately boils down to a HardFault Interrupt which triggers a Watchdog Reset.The majority of products in the field does not have...
When I go to debug, there is an error saying some source file isnt found (__lib_init) or something like this. I dont remember the name exactly. Then it gives me an option to go to preferences. Also, the debug doesnt run properly, my peripheral regist...
I am using an STM32L4R9ZIT. I have written a simple code to toggle a GPIO high and low, with a delay of 2 seconds in between. However, the controller never actually executes this functionality. When I run in debug mode, everything seems to be going a...
no distributor nor STM's eshop has any STM32-device."Out of stock" or "on allocation".Why shall we waste any further development time on STM32 when there are no chips available?So, is STM32 dead?In my opinion, STM32 is dead.Currently any other experi...
In RM0091, rev.9, 3.5.1 Flash access control register (FLASH_ACR):Reset value: 0x0000 0000[...]Bit 4 PRFTBE: Prefetch buffer enable 0: Prefetch is disabledIn RM0091, rev.9, Prefetch controller within 3.2.1:After reset, the state of the prefetch buff...
Hi Everyone,I am using stm32l073rz board, used both wakeup pin PWR_CSR_EWUP1 (PA0) and PWR_CSR_EWUP2 (PC13) for generating an interrupt to wakeup from standby mode, and I am enable both pin PWR->CSR |= (PWR_CSR_EWUP1 | PWR_CSR_EWUP2); before go to st...
I've got a "K9F1G08U0E" nand flash. I was trying to understand how to use the generated ECC in the STM32 MCU "ECCx register" to check the validity of data received from the NAND flash. but in the documentation there is no explanation on how to use th...
Good day to everyone on this forumI was working on a code, my borad is a Nucleo-144 STM32F746, At first I was trying to read 12 Analog signals, from 0 to 3V with DMA and the reads were good exept for some channels with noise and a weird offset, I red...
Hi,we have a strange behaviour which could be resolved by changing clock configuration, but we cannot explain why the errors occured in the first place. Perhaps some of you have any idea why the following happened:random hardfault during runtime afte...
