Resolved! STM32H750 (rev.V) Needs higher ADC clock for dual interleaved mode when triggered from timer?
According to AN5354:Page 13 / Table 12: Number of ADC = 2, resolution = 12, LQFP100, maximum ADC frequency is 35MHz (providing 70MHz from PLL2P before /2 divider)Page 15 / Table 16: Direct 4.38 MSPS Fast 3.83 MSPSAnd according to formula from RM: Tco...