The ST self-test library(en.x-cube-classb-v2-3-0) tested both watchdogs( IWDG and WWDG). Is it necessary to test both IWDG and WWDG for class B compliance? In the self-test library, they used both watchdogs. If I use one watchdog timer let's say WWDG...
I'd like to use a ST-Link Utility to extract F/WThe device I'm using is the "STR736FV0T6"and I have ST-LINK/V2 and ULINK2The other day, I had an experience of extracting the one on the STM32F205 device.Isn't STR736 supported?I want to know which JTAG...
I am using an RTC to wake up my MCU from shutdown mode. RTC is configured to use LSI clock, which runs during shutdown. When I run my code from a debugger, it works fine. Goes to sleep, wakes up from shutdown when the RTC pings it awake. I can see th...
Hi,In my experiment based on the STM32F091, a crystal connects between PF0-OSC_IN and PF1-OSC_OUT pins. When the two pins short which may lead the MCU stop working.Please let me know how to address the issue.Best regards,Elvis
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There's a file STM32Cube_Demo-STM32H735G-DK-V1.0.0 on the website, but it's not the one referenced in the accompanying .bat file (which has a name ending in "FULL") and seems to just (sometimes) load up the selection screen but mostly gives me a blan...
Hello,Is it possible to perform half-duplex communication like the attached document? (I understand that the timing to switch to Rx is tricky.)The Rx frame size is 3 instead of 1.After changing to Rx, can I receive 3 bytes continuously as shown in th...
I wonder if a regularly or sporadically missed clock pulse on the HSE clock input has any (negative) effect on the operation of the H7 processor or any clock output from a HRTIMER.My guess is that the internal PLL might lengthen the next pulse a litt...
Or at least make software reset work on only one core?Thanks
