I have a stm32f427 with 1Mx16 external SRAM and SDMMC.I am reading the SDMMC by DMA into the SRAM in two blocks of 512 bytes into a 1024 byte buffer.The SRAM is mapped from 0x64000000 - 0x641fffff. Address and data are not multiplexedI have now disco...
I need to send data one byte at a time via SPI. After transferring the byte, I set "Chip Select" from the program to state 1. I track the end of the transfer by the BSY bit in the SPI_SR register. But the microcontroller transmits two bytes, the firs...
I want to read registers of BQ40Z50 IC. Its using SMBus for tranceive data. But I need to speak with it using I2C. I use STM32F072 -> I2C2. It doesnt support SMBus-interface, but SMB is based on I2C.I havnt posibility to connect that IC to I2C1. We c...
Hi, From the st.com website/microcontrollers most of the links from the main page result in a "403 error" when clicking on the links to the various micros (See image below)This is an example link that is currently returning a 403 error. Any idea wha...
Hi,Master:I have the following questions about flash introduction in the manual (DM00091010):Question 1:The manual(3.2.2) says:"On the contrary, during a program/erase operation to the Flash memory, any attempt to read the Flash memory will stall t...
Hi,I'm currently working on a STM32H753. I'm trying to figure out how an ECC error upon a cache look up is reported. The cortex M7 reference manual doesn't provide much info in that regards with the following text:Each cache can also be configured wi...
Hi AlWondering how do you test the infrastructure before delivering it to the application teams?I’m basically referring to the HAL layer , CMSIS and all BSP layer with peripherals.Is there a known methodology for validation tests for these capabiliti...
Hi to you all!I'm trying to run external mode simulation using:- Matlab R2019b.-CubeMx 5.6.1-Mat\Target 5.6.0-Nucleo F767ZII managed to deploy and run the Simulink model using both Atollic TrueSTUDIO & EAR V8. (generate c code using Simulink and depl...
