STM32 MCUs Products

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stm32h750 qspi bank 2 only

Can I use a external flash in qspi mode connected to qspi peripheral bank 2 ?I wan to test 2 things:Dump code from ext flash to sram partition to execute appExecute in place code in ext flash I use bank2 because in lqfp 100 package i had direct and c...

JCuna.1 by Senior
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  • 1 replies
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Lossless data processing

Hello,I'm working with STM32F410RB , My question is not related to code but it's architectural. I'm using DMA uart to communicate with another device, i noticed that dma buffer change its content before my code processing the data. So i'm loosing som...

Ahajr.1 by Associate II
  • 616 Views
  • 2 replies
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SPI Mode get change in execution it get stuck

I am working on Nucleo-h745ziq board .I have to board i am doin the loop-backing. One board as master and another as slave. First I configure as both board as full duplex. After switching the switch the mode get change the MASTER only transmit and s...

MDeva.1 by Associate II
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  • 1 replies
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Resolved! When cache is enable DMA not update data

I am working on Nucleo-h745ziq board .I am enable the ADC ch3 and 12 bit resolution ,DMA is enabled and circular mode. I connect the 3v supply to ADC channel. But I doesn't get the updated value when I reset board I get updated value, when I disable ...

MDeva.1 by Associate II
  • 644 Views
  • 3 replies
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STM32H753i-EVAL2 LCD functionality

I am using the STM32H753i-EVAL2 board to test LCD and touch screen functionality. Currently I am unable to generate the code using CubeMX as sample codes dont have the .IOC file. I need help in setting up the LCD and touch screen via CubeMX.It is dif...

hrm2519 by Associate II
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  • 4 replies
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STM32H7 watchdog does not correctly reset. Example attached

I have been battling an issue for a while where upon a watchdog (WWDG1) timeout, the system was not correctly reset. I was finding that the CPU and NVIC are reset but all the peripherals are not reset after a watchdog reset, they keep their exact reg...

0693W000000WsqyQAC.jpg 0693W000000WsrDQAS.jpg 0693W000000WsrSQAS.png 0693W000000WssVQAS.png
ADunc.1 by Senior
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  • 34 replies
  • 2 kudos

STM32H743 3ADC's With DMA

I have implemented 3 ADC with DMA. ADC1 with DMA1 stream 0 , ADC2 with DMA2 stream 0 and ADC3 with BDMA channel 0 Resolution : 16 bit , ADC clock : 7MHZ , Sample : 8.5 cyclesAll these ADC are Time trigger for that i am using timer 1 as center aligned...

Kanna by Associate III
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  • 8 replies
  • 0 kudos