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Hello,I'm using an STM32F767 to measure input frequencies, using 2 timers.It's a bit tricky because these measurements must be synced to the SAI's audio sampling rate, AND input frequencies can be higher than the audio sampling rate.It took me a whil...
My target device is a STM32G0B1VE which has PE but according to RM0444 Reference manual for STM32G0x1 chips the description of EXTI_EXTICRx register says that combination for PE is not present (reserved). Is it really no possible to use PE for an ext...
Dear community, RM0091 (STM32F0x1) describes the structure of a 96-bit unique ID which consists of the lot number, wafer number, and wafer coordinates. RM0008 (STM32F103xx) has a 96-bit unique ID too, however, nothing is mentioned about wafer or lot ...
Hi,I have a project which has following tasks. While going through STM32f4 datasheet and reference manual I couldn't find any details regarding the processor cycle or computing time to judge my requirement.How can I select the between a 48MHz and 100...
Hi,We are facing a strange behaviour with our product (using a STM32F103 MCU):An ADC channel is initialized at startup in continuous conversion mode and the last conversion result is read periodically by an OS task (without problem).The product goes ...
Is there any training available around FD CAN communications ?
UART2 is used for as smart card communication. (sign data)UART1 is used for communication from outsideIt looks like the communication to the smart card can get disturbed by communication on UART1result invalid signature. The interrupt priority of UA...
Hello all. I am trying to set up a continuously running timer to use to set of interrupts at specific counts of the timer. So the user of this thing would say "setAlarm(n)" and at timer=n an interrupt goes off. But I also want interrupts for the ccr...
I am trying to run the GenericMQTT Example from the software package in the title. Path: STM32CubeExpansion_Cloud GenericV1.0.0\Projects\STM32L496G-Discovery\Applications\Cloud\GenericMQTTI have modified the source code to include a #define USE_BG96 ...
void HardFault_Handler(void){ /* USER CODE BEGIN HardFault_IRQn 0 */ __asm volatile ( " tst lr, #4 \n" " ite eq \n" " mrseq r0, msp \n" " mrsne r0, psp ...
