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Hi, I have been trying to deploy the 66GYMAI1 Camera on the STM32 N657X0Q Nucleo board with the Load and Run mode. However, there is a problem that I could not solve, which is that the project can not jump from FSBL to APPLI. Because I am trying to ...
Hello!Problem: I am using 3 timers in the Encoder function on the Nucleo F767ZI board. The timers are TIM1, TIM2, and TIM3. The encoder function on TIM1 works perfectly. However, the encoder function on TIM2 and TIM3 is not working. They just count u...
Hello,I am using STM32G0B1cbt6. And I am using native bootloader to update firmware. But in some boards not able to update firmware, it is giving below error:And when we replaced the MCU then bootloader started working normally. The failure percentag...
Hi! I have problem with setting option bytes from program. Setting OBs from Cube Programmer working good. MCU im using is STM32G0B1. I found and implement this function: HAL_StatusTypeDef optionByteSetBootFromPin(void) { FLASH_OBProgramInitTypeD...
What's up with the recommended 2MHz ? Im looking at F4 & F7 series...So 2MHz are recommended for VCOin (reference manual e.g 0410, RCC_PLLCFGR -> PLLM), but every Cube Example seems to be giving 1MHz to the VCOin.Even in datasheet (DS11532 Rev 8, Tab...
I want to configure IDMA in the sdmmc interface of H750, but I can't find a sample, is there a tutorial?i use stm32cubemx as the toolchain
Hello,Why am I getting a Memory Management fault when enabling the MPU for ADC1, even though the MPU region is configured correctly?Could it be due to alignment issues or internal access within the HAL code (e.g., ADC12_Common)?Any guidance would be ...
Dear Sir,We are currently developing a custom RF project using the STM32H747XIH6 microcontroller. In our design, we have successfully tested the Cortex-M7 core by executing various test programs, including LED blinking and ADC integration. However, w...
I'm using TouchGFX with an STM32H7, which provides RGB and MIPI-DSI interfaces but no native LVDS output.Riverdi offers LVDS displays and even dev boards using STM32H7—how is the LVDS interface achieved in such cases?
Inside the QSPI_EnableMemoryMappedMode function, the dummy cycles are MT25TL01G_DUMMY_CYCLES_READ_QUAD_DTR - 1.MT25TL01G_DUMMY_CYCLES_READ_QUAD_DTR is defined as 6U.The datasheet for MT25TL01G states that the DTR QUAD INPUT/OUTPUT FAST READ value is...
